Karnaugh Map Solver

Simplify Boolean expressions with interactive K-maps for 2-5 variables. Generate optimized logic and Verilog code instantly.

Quine-McCluskey Algorithm Verilog Generation SOP / POS Mode Circuit Diagram
Configuration
Current variables: A, B | SOP: Sum of Products (groups 1s) | POS: Product of Sums (groups 0s)
Truth Table
Configure output values: 0 for false, 1 for true, X for don't care
Karnaugh Map
Click cells to toggle: 0 → 1 → X → 0
Results
Simplified Boolean Expression (SOP)
Enter values in the truth table or K-map and click "Solve K-Map" to see the simplified expression

Logic Circuit Diagram